LTSpice Tutorial – Optimizing the model

So now the model generally works. But… for example I had problems with the ‘float’ that occurs when the circuit is unloaded. In the actual circuit I’d see numbers over 10VDC when the circuit was completely unloaded and there was no Zener diode was in place to limit the voltage. (Yes, read the application note on the LT3748 and you’ll find that it warns you of no-load output voltage float and recommends using a Zener diode to limit the float to some reasonable level)

One optimization in the LTspice application guide that wasn’t very detailed was the control loop compensation. That’s the VC pin on the LT3748 in this model. (See the “Loop compensation” section in the application guide). Basically all it says is “Connect a series RC from this pin to ground to compensate the switching regulator” and “see the examples in the application note”.

So… to optimize this we’ll be running and re-running the simulation with various parameters changed for each run. Hopefully, we’ll stumble across an optimum value.

Since we’ll be running lots of simulations with different parameters it will be useful to explore the LTSpice .STEP command. With the STEP command, you tell LTSpice to run the simulation multiple times and to vary a specific parameter each time. Yes, you can even have multiple STEP commands in the same simulation and they will run as a nested loop giving you a simulation run for each and every combination of STEP parameters. Sounds good? Well, don’t get carried away. Each iteration will likely take multiple hours to run, consider well the fact that two STEP commands of 5 values each will result in 25 executions of that one multi-hour simulation run. At some point LTSpice runs out of memory and dies. You’ll also chew up lots of disk space with all the resulting data. I’d suggest modifying the simulation command to only record data around the time-frame you are interested in, say the steady state conditions. Here, I’m running the simulation from 0ms-10ms, but recording values from 8ms-10ms.

LTSpice - simulation without recording all data

LTSpice – simulation without recording all data

Here are two very simple STEP examples you’ll likely use with this circuit. The first is varying the input voltage. Since I was intending this to run with power from an car’s 12VDC power, the incoming power to the circuit will likely be anything from 11.5VDC up to ~14VDC (actually spikes higher and lower than that, but that’s another story…)

To vary the input voltage. First, note that the input voltage comes from voltage source V1. In order to step the input voltage enter the following LTSpice text directive. (remember that’s just text that starts with a dot, simply placed in the circuit diagram)

.step V1 List 10.0 11.5 12 14

This will run 4 iterations of the simulation, one for each of the listed V1 voltages.

To vary the load on the circuit it’s a bit different because rather than changing a variable, you’ve got to change a property of the resistor model. That takes two changes. First, you have to right-mouse and change the properties on the load resistor. Instead of specifying a specific resistance value, you need to specify a variable. You do this by entering {name} like this:

LTSpice resistor value variable

LTSpice resistor value variable

Then you have to enter a .STEP directive to specify the values to use for that variable.

.step param RT list 100000,200,10,5,2.5

Each iteration will use a different value for RT, which we specified as the variable for the load resistor resistance value. So the first iteration will first run with a 100K load, then 200Ohms, then 10Ohms and so on all the way up to full load (2Amps) at 2.5Ohms.

Here’s the output that stepped load resistor will produce:

LTSpice stepping up the load on the circuit

LTSpice stepping up the load on the circuit

Note in the above the colors follow the steps in this order, Green, Dark Blue, Light Blue, Red, and finally Purple. So you can see the float for the 100K and even 200Ohm loads is pretty bad, almost up to 7 volts. Even at 10Ohms, the circuit is producing the 5.25VDC I designed, but it’s got some pretty high variability. It really only settles down with the 5 and 2.5Ohm loads. Not very good Try Right Mouse on the wave form display window and select Select Steps. That pulls up a dialog that lets you choose which specific steps to graph based on the values in the STEP list.

The next thing is to try different values of the RC pair on the VC pin on the LT3748. I could use one .STEP command for the R values and another .STEP command Load Resistor, but it generally makes a mess of the charts (too many lines) and it takes way too long. A more controlled approach is required. Manually changing the R value, then running the stepped load simulation to see the effect, then decide to move R up or down. Then once R is zeroed in on, try varying C.

Manually recording the resulting output voltages for each load for the stepped R values (using Excel to chart) gives something like this:

LTSpice - Effect of R4 on output variability

LTSpice – Effect of R on output variability

Appears that increasing the R improves the situation. On the surface it seems that increasing R more would be better, but what this chart does NOT show is that when R reaches 150K, the full load output voltage starts picking up a bunch of noise and variability. Based on this, probably R=75K is a better solution.

At this point you should have a pretty good idea of how to proceed, try different C values, run the stepped load simulation. Then once you’ve zeroed in on good RC values, go back and run the stepped input simulation just to verify correct operation across the whole operating range and then, at least for now, you’re done!

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